build(ariadne): vendor serde crates

This commit was merged in pull request #15.
This commit is contained in:
alexion committed 2026-09-05 20:21:54 -04:00
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use core::mem;
pub use core::arch::x86_64::*;
pub const fn _MM_SHUFFLE(z: u32, y: u32, x: u32, w: u32) -> i32 {
((z << 6) | (y << 4) | (x << 2) | w) as i32
}
pub const fn _mm_set_epi64x(e1: i64, e0: i64) -> __m128i {
unsafe { mem::transmute([e0, e1]) }
}
pub const fn _mm_set_epi32(e3: i32, e2: i32, e1: i32, e0: i32) -> __m128i {
unsafe { mem::transmute([e0, e1, e2, e3]) }
}
pub const fn _mm_set_epi16(
e7: i16,
e6: i16,
e5: i16,
e4: i16,
e3: i16,
e2: i16,
e1: i16,
e0: i16,
) -> __m128i {
unsafe { mem::transmute([e0, e1, e2, e3, e4, e5, e6, e7]) }
}
pub const fn _mm_set_epi8(
e15: i8,
e14: i8,
e13: i8,
e12: i8,
e11: i8,
e10: i8,
e9: i8,
e8: i8,
e7: i8,
e6: i8,
e5: i8,
e4: i8,
e3: i8,
e2: i8,
e1: i8,
e0: i8,
) -> __m128i {
unsafe {
mem::transmute([
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15,
])
}
}
pub const fn _mm_set1_epi64x(a: i64) -> __m128i {
_mm_set_epi64x(a, a)
}
pub const fn _mm_set1_epi32(a: i32) -> __m128i {
_mm_set_epi32(a, a, a, a)
}
pub const fn _mm_set1_epi16(a: i16) -> __m128i {
_mm_set_epi16(a, a, a, a, a, a, a, a)
}
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use core::f64::consts::LOG2_10;
use core::mem;
use num_bigint::BigUint as Uint;
const _: () = {
let static_data = mem::size_of_val(&crate::STATIC_DATA.pow10_significands)
+ mem::size_of_val(&crate::STATIC_DATA.exp_shifts)
+ mem::size_of_val(&crate::STATIC_DATA.exp_strings)
+ mem::size_of_val(&crate::DIGITS2);
if cfg!(opt_level = "s") {
assert!(static_data == 200);
} else {
assert!(static_data == 17232); // 16.8K
}
};
#[cfg(target_endian = "little")]
#[test]
fn utilities() {
let clz = u64::leading_zeros;
assert_eq!(clz(1), 63);
assert_eq!(clz(!0), 0);
assert_eq!(crate::count_trailing_nonzeros(0x00000000_00000000), 0);
assert_eq!(crate::count_trailing_nonzeros(0x00000000_00000001), 1);
assert_eq!(crate::count_trailing_nonzeros(0x00000000_00000009), 1);
assert_eq!(crate::count_trailing_nonzeros(0x00090000_09000000), 7);
assert_eq!(crate::count_trailing_nonzeros(0x01000000_00000000), 8);
assert_eq!(crate::count_trailing_nonzeros(0x09000000_00000000), 8);
}
#[test]
fn pow10() {
const DEC_EXP_MIN: i32 = -292;
// Range of decimal exponents [K_min, K_max] from the paper.
let dec_exp_min = -324_i32;
let dec_exp_max = 292_i32;
let num_bits = 128_i32;
// Negate dec_pow_min and dec_pow_max because we need negative powers 10^-k.
for (i, dec_exp) in (-dec_exp_max..=-dec_exp_min).enumerate() {
// dec_exp is -k in the paper.
let bin_exp = (f64::from(dec_exp) * LOG2_10).floor() as i32 - (num_bits - 1);
let bin_pow = Uint::from(2_u8).pow(bin_exp.unsigned_abs());
let dec_pow = Uint::from(10_u8).pow(dec_exp.unsigned_abs());
let result = if dec_exp < 0 {
bin_pow / dec_pow
} else if bin_exp < 0 {
dec_pow * bin_pow
} else {
dec_pow / bin_pow
};
let hi = u64::try_from(&result >> 64).unwrap();
let lo = u64::try_from(result & (Uint::from(2_u8).pow(64) - Uint::from(1_u8))).unwrap();
if !crate::Pow10SignificandTable::COMPRESS {
assert_eq!(
crate::STATIC_DATA
.pow10_significands
.get(DEC_EXP_MIN + i as i32),
crate::uint128 { hi, lo },
);
}
}
}
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use core::fmt::Display;
use core::ops::{Add, BitAnd, BitOr, BitOrAssign, BitXorAssign, Div, Mul, Shl, Shr, Sub};
pub trait Float: Copy {
const MANTISSA_DIGITS: u32;
const MIN_10_EXP: i32;
const MAX_10_EXP: i32;
const MAX_DIGITS10: u32;
}
impl Float for f32 {
const MANTISSA_DIGITS: u32 = Self::MANTISSA_DIGITS;
const MIN_10_EXP: i32 = Self::MIN_10_EXP;
const MAX_10_EXP: i32 = Self::MAX_10_EXP;
const MAX_DIGITS10: u32 = 9;
}
impl Float for f64 {
const MANTISSA_DIGITS: u32 = Self::MANTISSA_DIGITS;
const MIN_10_EXP: i32 = Self::MIN_10_EXP;
const MAX_10_EXP: i32 = Self::MAX_10_EXP;
const MAX_DIGITS10: u32 = 17;
}
pub trait UInt:
Copy
+ From<u8>
+ From<bool>
+ Add<Output = Self>
+ Sub<Output = Self>
+ Mul<Output = Self>
+ Div<Output = Self>
+ BitAnd<Output = Self>
+ BitOr<Output = Self>
+ Shl<u8, Output = Self>
+ Shl<i32, Output = Self>
+ Shl<u32, Output = Self>
+ Shr<i32, Output = Self>
+ Shr<u32, Output = Self>
+ BitOrAssign
+ BitXorAssign
+ PartialOrd
+ Into<u64>
+ Display
{
type Signed: Ord;
}
impl UInt for u32 {
type Signed = i32;
}
impl UInt for u64 {
type Signed = i64;
}